01 Record

CVE-2025-31936

Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processors when using Intel(R) TDX within SMM may allow an escalation of privilege. SMM adversary with a

HighPUBLISHEDCNA: intel

CNA base score7.0 CVSS v4.0CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N

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02 Description

Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processors when using Intel(R) TDX within SMM may allow an escalation of privilege. SMM adversary with a

03 Exploitation and scoring

Exploitation

Assessed, none found. CISA's assessment recorded neither public exploit code nor evidence of exploitation when it was made.

SSVC decision

ExploitationnoneCISA recorded no public exploit code and no evidence of exploitation.
AutomatablenoAt least one step from reconnaissance to exploitation cannot be reliably automated.
Technical ImpacttotalSuccessful exploitation gives total control of the vulnerable component.

CISA publishes the decision points, not a final SSVC decision. The decision also depends on mission and well-being impact, which is a property of your deployment rather than of the vulnerability.

EPSS probability

0.09% probability of exploitation activity in the next 30 days.

EPSS percentile

Equal to or higher than the score of 0.8% of scored records. A rank, not a probability.

NVD base score

7.0 (CVSS v4.0), scored by the NVD independently of the CNA.

NVD CVSS vector

CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X

NVD analysis status

Analyzed. NVD last modified this record on 2026-09-29.

Red Hat severity

Moderate. Red Hat's rating for its own products, not a CVSS rating.

Exploit-prediction scores from FIRST. Independent scoring and analysis status from the NVD. Vendor severity from Red Hat. Exploitation assessment and catalog membership from CISA.

04 Metadata

Published

2026-08-11 16:28Z2 MO AGO

Last updated

2026-08-12 14:46Z2 MO AGO

Reserved

2025-04-10

Assigning CNA

intel

Record state

PUBLISHED

Severity

High (CVSS 7.0)

CNA CVSS vector

CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N

Weaknesses

CWE-1260Improper Handling of Overlap Between Protected Memory RangesBase
CWE-823Use of Out-of-range Pointer OffsetBase

Data version

5.2

Document digest

bb8984ba821875bd1a35eff7f0afcfb54c5b866351e5c36489774d2043248bca

05 Affected products

VendorProductVersionsPlatforms

n/aIntel(R) Xeon(R) 6 processors when using Intel(R) TDXSee references—

06 References

intel.comhttps://intel.com/content/www/us/en/security-center/advisory/intel-sa-01379.html

07 Fixed in

AlmaLinux 8

microcode_ctl
Fixed in 4:20260812-1.el8_10

AlmaLinux 9

microcode_ctl
Fixed in 4:20260210-1.20260812.1.el9_8

AlmaLinux 10

microcode_ctl
Fixed in 4:20260812-0.el10_2

CloudLinux 8

microcode_ctl
Fixed in 4:20260812-1.el8_10

Derived from AlmaLinux 8. Partial coverage: only packages taken from AlmaLinux 8 are listed.

CloudLinux 9

microcode_ctl
Fixed in 4:20260210-1.20260812.1.el9_8

Derived from AlmaLinux 9. Partial coverage: only packages taken from AlmaLinux 9 are listed.

CloudLinux 10

microcode_ctl
Fixed in 4:20260812-0.el10_2

Derived from AlmaLinux 10. Partial coverage: only packages taken from AlmaLinux 10 are listed.

Debian 12

intel-microcode
No fix yet

Source: Debian Security Tracker, the Debian security team. Received through OSV.dev. Reformatted by exploit.cc.

Debian 13

intel-microcode
No fix yet

Source: Debian Security Tracker, the Debian security team. Received through OSV.dev. Reformatted by exploit.cc.

Debian 14

intel-microcode
No fix yet

Source: Debian Security Tracker, the Debian security team. Received through OSV.dev. Reformatted by exploit.cc.