{
    "dataType": "CVE_RECORD",
    "dataVersion": "5.2",
    "cveMetadata": {
        "cveId": "CVE-2022-49565",
        "assignerOrgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
        "state": "PUBLISHED",
        "assignerShortName": "Linux",
        "dateReserved": "2025-02-26T02:21:30.410Z",
        "datePublished": "2025-02-26T02:23:11.213Z",
        "dateUpdated": "2026-05-11T19:02:24.606Z"
    },
    "containers": {
        "cna": {
            "providerMetadata": {
                "orgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
                "shortName": "Linux",
                "dateUpdated": "2026-05-11T19:02:24.606Z"
            },
            "descriptions": [
                {
                    "lang": "en",
                    "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nperf/x86/intel/lbr: Fix unchecked MSR access error on HSW\n\nThe fuzzer triggers the below trace.\n\n[ 7763.384369] unchecked MSR access error: WRMSR to 0x689\n(tried to write 0x1fffffff8101349e) at rIP: 0xffffffff810704a4\n(native_write_msr+0x4/0x20)\n[ 7763.397420] Call Trace:\n[ 7763.399881]  <TASK>\n[ 7763.401994]  intel_pmu_lbr_restore+0x9a/0x1f0\n[ 7763.406363]  intel_pmu_lbr_sched_task+0x91/0x1c0\n[ 7763.410992]  __perf_event_task_sched_in+0x1cd/0x240\n\nOn a machine with the LBR format LBR_FORMAT_EIP_FLAGS2, when the TSX is\ndisabled, a TSX quirk is required to access LBR from registers.\nThe lbr_from_signext_quirk_needed() is introduced to determine whether\nthe TSX quirk should be applied. However, the\nlbr_from_signext_quirk_needed() is invoked before the\nintel_pmu_lbr_init(), which parses the LBR format information. Without\nthe correct LBR format information, the TSX quirk never be applied.\n\nMove the lbr_from_signext_quirk_needed() into the intel_pmu_lbr_init().\nChecking x86_pmu.lbr_has_tsx in the lbr_from_signext_quirk_needed() is\nnot required anymore.\n\nBoth LBR_FORMAT_EIP_FLAGS2 and LBR_FORMAT_INFO have LBR_TSX flag, but\nonly the LBR_FORMAT_EIP_FLAGS2 requirs the quirk. Update the comments\naccordingly."
                }
            ],
            "affected": [
                {
                    "product": "Linux",
                    "vendor": "Linux",
                    "defaultStatus": "unaffected",
                    "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
                    "programFiles": [
                        "arch/x86/events/intel/lbr.c"
                    ],
                    "versions": [
                        {
                            "version": "1ac7fd8159a842b3aa51f0b46a351fa3eeb8fbf3",
                            "lessThan": "625bcd0685a1612225df83468c83412fc0edb3d7",
                            "status": "affected",
                            "versionType": "git"
                        },
                        {
                            "version": "1ac7fd8159a842b3aa51f0b46a351fa3eeb8fbf3",
                            "lessThan": "b0380e13502adf7dd8be4c47d622c3522aae6c63",
                            "status": "affected",
                            "versionType": "git"
                        }
                    ]
                },
                {
                    "product": "Linux",
                    "vendor": "Linux",
                    "defaultStatus": "affected",
                    "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
                    "programFiles": [
                        "arch/x86/events/intel/lbr.c"
                    ],
                    "versions": [
                        {
                            "version": "5.17",
                            "status": "affected"
                        },
                        {
                            "version": "0",
                            "lessThan": "5.17",
                            "status": "unaffected",
                            "versionType": "semver"
                        },
                        {
                            "version": "5.18.15",
                            "lessThanOrEqual": "5.18.*",
                            "status": "unaffected",
                            "versionType": "semver"
                        },
                        {
                            "version": "5.19",
                            "lessThanOrEqual": "*",
                            "status": "unaffected",
                            "versionType": "original_commit_for_fix"
                        }
                    ]
                }
            ],
            "cpeApplicability": [
                {
                    "nodes": [
                        {
                            "operator": "OR",
                            "negate": false,
                            "cpeMatch": [
                                {
                                    "vulnerable": true,
                                    "criteria": "cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*",
                                    "versionStartIncluding": "5.17",
                                    "versionEndExcluding": "5.18.15"
                                },
                                {
                                    "vulnerable": true,
                                    "criteria": "cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*",
                                    "versionStartIncluding": "5.17",
                                    "versionEndExcluding": "5.19"
                                }
                            ]
                        }
                    ]
                }
            ],
            "references": [
                {
                    "url": "https://git.kernel.org/stable/c/625bcd0685a1612225df83468c83412fc0edb3d7"
                },
                {
                    "url": "https://git.kernel.org/stable/c/b0380e13502adf7dd8be4c47d622c3522aae6c63"
                }
            ],
            "title": "perf/x86/intel/lbr: Fix unchecked MSR access error on HSW",
            "x_generator": {
                "engine": "bippy-1.2.0"
            }
        }
    }
}